基于单片机的步进电机电路控制设计英文文献及翻译.docx
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1、TheSteppermotorcontrolcircuitbebasedonSinglechipmicrocomputerTheAT89C51isalow-power,high-performanceCMOS8-bitmicrocomputerwith4KbytesofFlashprogrammableanderasablereadonlymemory(PEROM).ThedeviceismanufacturedusingAtmeshigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindustrystandardMCS-5
2、1instructionsetandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theAtmelAT89C51isapowerfulmicrocomputerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontr
3、olapplications.FunctioncharacteristicTheAT89C51providesthefollowingstandardfeatures:4KbytesofFlash,128bytesofRAM,32I/Olines,two16-bittimer/counters,afivevectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillatorandclockcircuitry.Inaddition,theAT89C51isdesignedwithstaticlogicforoper
4、ationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialportandinterruptsystemtocontinuefunctioning.ThePower-downModesavestheRAMcontentsbutfreezestheoscillatordisablingallotherchipfunctionsuntilthenexthardwarereset.PinDe
5、scriptionVCC:Supplyvoltage.GND:Ground.Port0:PortOisan8-bitopen-drainbi-directionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.WhenIsarewrittentoportOpins,thepinscanbeusedasHighimpedanceinuts.PortOmayalsobeconfiguredtobethemultiplexedIoworderaddress/databusduringaccessestoexternalprogramandda
6、tamemory.InthismodePOhasinternalpullups.PortOalsoreceivesthecodebytesduringFlashprogramming,andoutputsthecodebytesduringprogramverification.Externalpullupsarerequiredduringprogramverification.PortlPort1isan8-bitbi-directionalI/Oportwithinternalpullups.ThePOrt1outputbufferscansink/sourcefourTTLinputs
7、.WhenIsarewrittentoPort1pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpullups.Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.Port2Port2isan8-bitbi-directionalI/O
8、portwithinternalpullups.ThePort2outputbufferscansink/sourcefourTTLinuts.When1sarewrittentoPort2pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputsAsinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent,becauseoftheinternalpullups.Port2emitsthehigh-orderaddressbyteduringfetchesfr
9、omexternalprogrammemoryandduringaccessestoexternaldatamemorythatuse16-bitaddresses.Inthisapplication,itusesstronginternalpullupswhenemittingIs.Duringaccessestoexternaldatamemorythatuse8-bitaddresses,Port2emitsthecontentsoftheP2SpecialFunctionRegistenPort2alsoreceivesthehigh-orderaddressbitsandsomeco
10、ntrolsignalsduringFlashprogrammingandverification.Port3Port3isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort3outputbufferscansink/sourcefourTTLinputs.WhenIsarewrittentoPort3pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsou
11、rcecurrent(IIL)becauseofthepullups.Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89C51aslistedbelow:Port3alsoreceivessomecontrolsignalsforFlashprogrammingandverification.RSTResetinputAhighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.ALE/PROGAddressLatchEnableout
12、putpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput(PROG)duringFlashprogrammingJnnormaloperationALEisemittedataconstantrateof1/6theoscillatorfrequency,andmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeach
13、accesstoexternalDataMemory.Ifdesired,ALEoperationcanbedisabledbysettingbitOofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.PSENProgramStoreEnableisthereadstr
14、obetoexternalprogrammemory.WhentheAT89C51isexecutingcodefromexternalprogrammemory,PSENisactivatedtwiceeachmachinecycle,exceptthattwoPSENactivationsareskippedduringeachaccesstoexternaldatamemory.EA/VPPExternalAccessEnable.EAmustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemo
15、rylocationsstartingatOOOOHuptoFFFFH.Note,however,thatiflockbit1isprogrammed,EAwillbeinternallylatchedonreset.EAshouldbestrappedtoVCCforinternalprogramexecutions.Thispinalsoreceivesthe12-voltprogrammingenablevoltage(VPP)duringFlashprogramming,forpartsthatrequire12-voltVPP.XTALlInputtotheinvertingosci
16、llatoramplifierandinputtotheinternalclockoperatingcircuit.XTAL2OutputfromtheinvertingoscillatoramplifierOscillatorCharacteristicsXTALlandXTAL2aretheinputandoutput,respectively,ofaninvertingamplifierwhichcanbeconfiguredforuseasanon-chiposcillator,asshowninFigureLEitheraquartzcrystalorceramicresonator
17、maybeused.Todrivethedevicefromanexternalclocksource,XTAL2shouldbeleftunconnectedwhileXTALlisdrivenasshowninFigure2.Therearenorequirementsonthedutycycleoftheexternalclocksignal,sincetheinputtotheinternalclockingcircuitryisthroughadivide-by-twoflip-flop,butminimumandmaximumvoltagehighandlowtimespecifi
18、cationsmustbeobserved.Figure1.OscillatorConnectionsFigure2.ExternalClockDriveConfigurationIdleModeInidlemode,theCPUputsitselftosleepwhilealltheonchipperipheralsremainactive.Themodeisinvokedbysoftware.Thecontentoftheon-chipRAMandallthespecialfunctionsregistersremainunchangedduringthismode.Theidlemode
19、canbeterminatedbyanyenabledinterruptorbyahardwarereset.ltshouldbenotedthatwhenidleisterminatedbyahardwarereset,thedevicenormallyresumesprogramexecution,fromwhereitleftoff,uptotwomachinecyclesbeforetheinternalresetalgorithmtakescontrol.On-chiphardwareinhibitsaccesstointernalRAMinthisevent,butaccessto
20、theportpinsisnotinhibited.ToeliminatethepossibilityofanunexpectedwritetoaportpinwhenIdleisterminatedbyreset,theinstructionfollowingtheonethatinvokesIdleshouldnotbeonethatwritestoaportpinortoexternalmemory.Power-downModeInthepower-downmode,theoscillatorisstopped,andtheinstructionthatinvokespowerdowni
21、sthelastinstructionexecuted.Theon-chipRAMandSpecialFunctionRegistersretaintheirvaluesuntilthepower-downmodeisterminated.Theonlyexitfrompower-downisahardwarereset.ResetredefinestheSFRsbutdoesnotchangetheon-chipRAM.TheresetshouldnotbeactivatedbeforeVCCisrestoredtoitsnormaloperatinglevelandmustbeheldac
22、tivelongenoughtoallowtheoscillatortorestartandstabilize.ProgramMemoryLockBitsOnthechiparethreelockbitswhichcanbeleftunprogrammed(U)orcanbeprogrammed(P)toobtaintheadditionalfeatureslistedinthetablebelow.Whenlockbit1isprogrammed,thelogiclevelattheEApinissampledandlatchedduringreset.Ifthedeviceispowere
23、dupwithoutareset,thelatchinitializestoarandomvalue,andholdsthatvalueuntilresetisactivated.ItisnecessarythatthelatchedvalueofEAbeinagreementwiththecurrentlogiclevelatthatpininorderforthedevicetofunctionproperly.IntroductionSteppermotorsareelectromagneticincremental-motiondeviceswhichconvertdigitalpul
24、seinputstoanalogangleoutputs.Theirinherentsteppingabilityallowsforaccuratepositioncontrolwithoutfeedback.Thatis,theycantrackanysteppositioninopen-loopmode,ConsequentlynofeedbackisneededtoimplementpositioncontrolSteppermotorsdeliverhighereaktorqueperunitweightthanDCmotors;inaddition,theyarebrushlessm
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